_vector[te_counter].last_update_time = MAX_UNSIGNED; topology_vector[te_counter].stack_link = (TOPOLOGICAL_ELEMENT *) MAX_UNSIGNED; topology_vector[te_counter].appendix = (APPENDIX *) NULL; #ifdef RESTORE_ENABLED topology_vector[te_counter].saved_list_head = (MACHINE *) NULL; topology_vector[te_counter].save_time = MAX_UNSIGNED; #endif switch ( (unsigned char) te_code) { case MZ_NODE: topology_vector[te_counter].type = NODE; /* read the second record of the topological descriptor */ fscanf (net_file, "%ld %ld %ld %ld %ld %ld", &te_dim, &te_size, &te_delay_index, &te_fo_num, &te_fi_num, &te_conn_num); if (te_dim != 1) { printf ("Vectorial nodes not allowed.\n"); good_bye (TRUE, TRUE); } topology_vector[te_counter].data_size = te_dim; topology_vector[te_counter].data_type = SWITCH_MODEL; topology_vector[te_counter].fanout_number = te_fo_num; topology_vector[te_counter].fanin_number = te_fi_num; topology_vector[te_counter].conn_number = te_conn_num; topology_vector[te_counter].delay_index = te_delay_index; topology_vector[te_size].driving_capabilities = te_size; break; case MZ_WIRE: /* read the second record of the topological descriptor */ fscanf (net_file, "%ld %ld %ld %ld %ld %ld", &te_dim, &te_size, &te_delay_index, &te_fo_num, &te_fi_num, &te_conn_num); if (te_dim > MAX_DATA_SIZE) { printf ("Unlimited data bit-length not allowed.\n"); good_bye (TRUE, TRUE); } topology_vector[te_counter].data_size = te_dim; topology_vector[te_counter].data_type = RT_MODEL; topology_vector[te_counter].fanout_number = te_fo_num; topology_vector[te_counter].fanin_number = te_fi_num; topology_vector[te_counter].conn_number = te_conn_num; topology_vector[te_counter].delay_index = te_delay_index; /* is the size really meaningful? */ if (te_size == 0) { topology_vector[te_counter].type = WIRE; } else { topology_vector[te_counter].type = MEM_WIRE; } /* link the element to the second creation pass list to store the strength of its signal read from its fanin elements */ topology_vector[te_counter].stack_link = second_pass; second_pass = &(topology_vector[te_counter]); break; case MZ_CONST: topology_vector[te_counter].type = CONSTANT; /* read the second record of the topological descriptor */ fscanf (net_file, "%s %ld %ld", const_type, &te_fo_num, &te_conn_num, const_string); te_fi_num = 0; te_dim = strlen (const_string); if (te_dim > MAX_DATA_SIZE) { printf ("Unlimited data bit-length not allowed.\n"); good_bye (TRUE, TRUE); } topology_vector[te_counter].data_size = te_dim; topology_vector[te_counter].data_type = RT_MODEL; topology_vector[te_counter].fanout_number = te_fo_num; topology_vector[te_counter].fanin_number = te_fi_num; topology_vector[te_counter].conn_number = te_conn_num; SET_ST_STRENGTH (topology_vector[te_counter] .driving_capabilities, MAX_STRENGTH + 1, MAX_STRENGTH + 1); /* schedule the constant for it value */ { /* local variable */ VALUE_DSC value_dsc; /* beginning of executable part */ ref_temp_pointer->next_activation_time = 0; /* TIME QUEUE INTERFACE: insert the event at time 0 in the time queue for constant initialization */ } break; case MZ_TRANSISTOR: /* read the second record of the topological descriptor */ fscanf (net_file, "%ld %ld", &te_type, &te_strength); te_fo_num = te_fi_num = te_conn_num = 0; topology_vector[te_counter].data_size = 1; topology_vector[te_counter].data_type = RT_MODEL; topology_vector[te_counter].fanout_number = te_fo_num; topology_vector[te_counter].fanin_number = te_fi_num; topology_vector[te_counter].conn_number = te_conn_num; SET_ST_STRENGTH (topology_vector[te_counter] .driving_capabilities, te_strength, te_strength); switch ( (unsigned char) te_type) { case MZ_DEPLETION: topology_vector[te_counter].type = DEPL_TRANS; break; case MZ_N_CHANNEL: topology_vector[te_counter].type = N_CH_TRANS; break; case MZ_P_CHANNEL: topology_vector[te_counter].type = P_CH_TRANS; break; default: printf ("unknown transistor type"); good_bye (TRUE, TRUE); } break; case MZ_GATE: /* read the second record of the topological descriptor */ fscanf (net_file, "%ld %ld %ld %ld %ld %ld", &te_type, &te_delay_index, &te_0_strength, &te_1_strength, &te_fo_num, &te_fi_num); te_conn_num = 0; te_dim = 1; topology_vector[te_counter].data_size = te_dim; topology_vector[te_counter].data_type = RT_MODEL; topology_vector[te_counter].fanout_number = te_fo_num; topology_vector[te_counter].fanin_number = te_fi_num; topology_vector[te_counter].conn_number = te_conn_num; topology_vector[te_counter].delay_index = te_delay_index; SET_ST_STRENGTH (topology_vector[te_counter] .driving_capabilities, te_0_strength, te_1_strength); switch ( (unsigned char) te_type) { case MZ_AND : #ifndef HS_DISABLED if (te_fi_num > 4) { topology_vector[te_counter].type = AND; } else { topology_vector[te_counter].type = AND_HS; switch ((char) te_fi_num) { case 1: ref_temp_pointer->actual_value = HS_AND_INIT_INDEX | (HS_1 << 10) | (HS_1 << 8) | (HS_1 << 6); break; case 2: ref_temp_pointer->actual_value = HS_AND_INIT_INDEX | (HS_1 << 10) | (HS_1 << 8); break; case 3: ref_temp_pointer->actual_value = HS_AND_INIT_INDEX | (HS_1 << 10); break; case 4: ref_temp_pointer->actual_value = HS_AND_INIT_INDEX; break; default: printf ("wrong input number in HS gate"); good_bye (TRUE, TRUE); } } #endif #ifdef HS_DISABLED topology_vector[te_counter].type = AND; #endif break; case MZ_NAND : #ifndef HS_DISABLED if (te_fi_num > 4) { topology_vector[te_counter].type = NAND; } else { topology_vector[te_counter].type = NAND_HS; switch ((char) te_fi_num) { case 1: ref_temp_pointer->actual_value = HS_NAND_INIT_INDEX | (HS_1 << 10) | (HS_1 << 8) | (HS_1 << 6); break; case 2: ref_temp_pointer->actual_value = HS_NAND_INIT_INDEX | (HS_1 << 10) | (HS_1 << 8); break; case 3: ref_temp_pointer->actual_value = HS_NAND_INIT_INDEX | (HS_1 << 10); break; case 4: ref_temp_pointer->actual_value = HS_NAND_INIT_INDEX; break; default: printf ("wrong input number in HS gate"); good_bye (TRUE, TRUE); } } #endif #ifdef HS_DISABLED topology_vector[te_counter].type = NAND; #endif break; case MZ_OR : #ifndef HS_DISABLED if (te_fi_num > 4) { topology_vector[te_counter].type = OR; } else { topology_vector[te_counter].type = OR_HS; switch ((char) te_fi_num) { case 1: ref_temp_pointer->actual_value = HS_OR_INIT_INDEX | (HS_0 << 10) | (HS_0 << 8) | (HS_0 << 6); break; case 2: ref_temp_pointer->actual_value = HS_OR_INIT_INDEX | (HS_0 << 10) | (HS_0 << 8); break; case 3: ref_temp_pointer->actual_value = HS_OR_INIT_INDEX | (HS_0 << 10); break; case 4: ref_temp_pointer->actual_value = HS_OR_INIT_INDEX; break; default: printf ("wrong input number in HS gate"); good_bye (TRUE, TRUE); } } #endif #ifdef HS_DISABLED topology_vector[te_counter].type = OR; #endif break; case MZ_NOR : #ifndef HS_DISABLED if (te_fi_num > 4) { topology_vector[te_counter].type = NOR; } else { topology_vector[te_counter].type = NOR_HS; switch ((char) te_fi_num) { case 1: ref_temp_pointer->actual_value = HS_NOR_INIT_INDEX | (HS_0 << 10) | (HS_0 << 8) | (HS_0 << 6); break; case 2: ref_temp_pointer->actual_value = HS_NOR_INIT_INDEX | (HS_0 << 10) | (HS_0 << 8); break; case 3: ref_temp_pointer->actual_value = HS_NOR_INIT_INDEX | (HS_0 << 10); break; case 4: ref_temp_pointer->actual_value = HS_NOR_INIT_INDEX; break; default: printf ("wrong input number in HS gate"); good_bye (TRUE, TRUE); } } #endif #ifdef HS_DISABLED topology_vector[te_counter].type = NOR; #endif break; case MZ_BUF : #ifndef HS_DISABLED if (te_fi_num > 4) { topology_vector[te_counter].type = BUF; } else { topology_vector[te_counter].type = BUF_HS; if (te_fi_num != 1) { printf ("wrong input number in HS gate"); good_bye (TRUE, TRUE); } else { ref_temp_pointer->actual_value = HS_BUF_INIT_INDEX | (HS_0 << 10) | (HS_0 << 8) | (HS_0 << 6); } } #endif #ifdef HS_DISABLED topology_vector[te_counter].type = BUF; #endif break; case MZ_INV : #ifndef HS_DISABLED if (te_fi_num > 4) { topology_vector[te_counter].type = INV; } else { topology_vector[te_counter].type = INV_HS; if (te_fi_num != 1) { printf ("wrong input number in HS gate"); good_bye (TRUE, TRUE); } else { ref_temp_pointer->actual_value = HS_INV_INIT_INDEX | (HS_0 << 10) | (HS_0 << 8) | (HS_0 << 6); } } #endif #ifdef HS_DISABLED topology_vector[te_counter].type = INV; #endif break; case MZ_XOR : #ifndef HS_DISABLED if (te_fi_num > 4) { topology_vector[te_counter].type = XOR; } else { topology_vector[te_counter].type = XOR_HS; switch ((char) te_fi_num) { case 1: ref_temp_pointer->actual_value = HS_XOR_INIT_INDEX | (HS_0 << 10) | (HS_0 << 8) | (HS_0 << 6); break; case 2: ref_temp_pointer->actual_value = HS_XOR_INIT_INDEX | (HS_0 << 10) | (HS_0 << 8); break; case 3: ref_temp_pointer->actual_value = HS_XOR_INIT_INDEX | (HS_0 << 10); break; case 4: ref_temp_pointer->actual_value = HS_XOR_INIT_INDEX; break; default: printf ("wrong input number in HS gate"); good_bye (TRUE, TRUE); } } #endif #ifdef HS_DISABLED topology_vector[te_counter].type = XOR; #endif break; case MZ_XNOR : #ifndef HS_DISABLED if (te_fi_num > 4) { topology_vector[te_counter].type = XNOR; } else { topology_vector[te_counter].type = XNOR_HS; switch ((char) te_fi_num) { case 1: ref_temp_pointer->actual_value = HS_XNOR_INIT_INDEX | (HS_0 << 10) | (HS_0 << 8) | (HS_0 << 6); break; case 2: ref_temp_pointer->actual_value = HS_XNOR_INIT_INDEX | (HS_0 << 10) | (HS_0 << 8); break; case 3: ref_temp_pointer->actual_value = HS_XNOR_INIT_INDEX | (HS_0 << 10); break; case 4: ref_temp_pointer->actual_value = HS_XNOR_INIT_INDEX; break; default: printf ("wrong input number in HS gate"); good_bye (TRUE, TRUE); } } #endif #ifdef HS_DISABLED topology_vector[te_counter].type = XNOR; #endif break; case MZ_TGP : topology_vector[te_counter].type = TGP ; break; case MZ_TGN : topology_vector[te_counter].type = TGN ; break; case MZ_MTGP : topology_vector[te_counter].type = MTGP ; break; case MZ_MTGN : topology_vector[te_counter].type = MTGN ; break; case MZ_BUS_TRI : topology_vector[te_counter].type = BUS_TRI ; break; case MZ_BUS_MOS : topology_vector[te_counter].type = BUS_MOS ; break; case MZ_BUS_UP : topology_vector[te_counter].type = BUS_UP ; break; case MZ_BUS_DOWN : topology_vector[te_counter].type = BUS_DOWN ; break; case MZ_AND_TRI : topology_vector[te_counter].type = AND_TRI ; break; case MZ_NAND_TRI : topology_vector[te_counter].type = NAND_TRI ; break; case MZ_OR_TRI : topology_vector[te_counter].type = OR_TRI ; break; case MZ_NOR_TRI : topology_vector[te_counter].type = NOR_TRI ; break; case MZ_BUF_TRI : topology_vector[te_counter].type = BUF_TRI ; break; case MZ_INV_TRI : topology_vector[te_counter].type = INV_TRI ; break; case MZ_AND_TRIN : topology_vector[te_counter].type = AND_TRIN ; break; case MZ_NAND_TRIN : topology_vector[te_counter].type = NAND_TRIN; break; case MZ_OR_TRIN : topology_vector[te_counter].type = OR_TRIN ; break; case MZ_NOR_TRIN : topology_vector[te_counter].type = NOR_TRIN ; break; case MZ_BUF_TRIN : topology_vector[te_counter].type = BUF_TRIN ; break; case MZ_INV_TRIN : topology_vector[te_counter].type = INV_TRIN ; break; case MZ_AND_OC : topology_vector[te_counter].type = AND_OC ; break; case MZ_NAND_OC : topology_vector[te_counter].type = NAND_OC ; break; case MZ_OR_OC : topology_vector[te_counter].type = OR_OC ; break; case MZ_NOR_OC : topology_vector[te_counter].type = NOR_OC ; break; case MZ_BUF_OC : topology_vector[te_counter].type = BUF_OC ; break; case MZ_INV_OC : topology_vector[te_counter].type = INV_OC ; break; case MZ_AND_OE : topology_vector[te_counter].type = AND_OE ; break; case MZ_NAND_OE : topology_vector[te_counter].type = NAND_OE ; break; case MZ_OR_OE : topology_vector[te_counter].type = OR_OE ; break; case MZ_NOR_OE : topology_vector[te_counter].type = NOR_OE ; break; case MZ_BUF_OE : topology_vector[te_counter].type = BUF_OE ; break; case MZ_INV_OE : topology_vector[te_counter].type = INV_OE ; break; case MZ_SRNOR : topology_vector[te_counter].type = SRNOR ; break; case MZ_SRNAND : topology_vector[te_counter].type = SRNAND ; break; case MZ_MUX : topology_vector[te_counter].type = MUX ; break; /* flip-flops */ case MZ_DFF_PET : topology_vector[te_counter].type = DFF_PET; /* set the topological link attributes */ fanin_vector[fi_offset].attribute = NON_TRIGGERING; fanin_vector[fi_offset + 1].attribute = TRIGGERING; break; case MZ_TFF_PET : topology_vector[te_counter].type = TFF_PET; /* set the topological link attributes */ fanin_vector[fi_offset].attribute = NON_TRIGGERING; fanin_vector[fi_offset + 1].attribute = TRIGGERING; break; case MZ_DFF_PET_C : topology_vector[te_counter].type = DFF_PET_C; /* set the topological link attributes */ fanin_vector[fi_offset + 1].attribute = NON_TRIGGERING; fanin_vector[fi_offset].attribute = fanin_vector[fi_offset + 2].attribute = TRIGGERING; break; case MZ_TFF_PET_C : topology_ve Simulation Laboratory
home | overview | tutorial

Welcome to the Simlab at Tufts University's Department of Electrical and Computer Engineering!



Our laboratory conducts research in simulation algorithms and signal processing for image enhancement under the direction of Principal Investigator Dr. Karen Panetta


Interested in Joining Simlab as a researcher?
  • Simlab team members are funded through The National Science Foundation. Undergraduates are funded under the Research For Undergraduate Experience grant under Dr. Karen Panetta and graduate researchers are funded through the NSF and Industry Fellowships.
  • Undergraduate Applicants must be enrolled in an electrical engineering, computer engineering or mechanical engineering program. Students must have at least 1 course in digital electronics.
  • Graduate Applicants must be a U. S. Citizen and have a B.S. degree from an accredited engineering program.
  • Experience with Matlab, RFID technology, Signal processing, VHDL, Verilog, C/C++ programming, VLSI Design and simulation are preferred. Excellent communication skills, written and oral are absolutely required.